Content-addressable memory (CAM), also known as associative memory or associative storage, is a type of memory used in, for example, certain very high speed searching applications, such as, lookup tables, databases, data compression, etc. Unlike standard computer memory (e.g., random access memory (RAM)) in which the user supplies a memory address and the RAM returns the data word stored at that address, a CAM is designed such that the user supplies a search word and the CAM searches to see if that search word is stored anywhere in the CAM. If the search word is found, the CAM returns a list of one or more storage addresses where the word was found, and in some architectures, also returns the data word and/or other associated data. Thus, a CAM is the hardware embodiment of what in software terms would be referred to as an associative array.
Because a CAM is designed to search its entire memory in a single operation, it is significantly faster than RAM in virtually all search applications. There are some cost disadvantages to CAM however. For example, unlike RAM, which utilizes comparatively simple storage cells, each individual memory cell in a fully parallel CAM generally has its own associated comparison circuit to detect a match between a stored data bit and an input search bit. Additionally, match line outputs from each CAM cell in a given data word are combined to yield a complete data word match signal. The additional circuitry required by a CAM increases the physical size of the CAM chip which increases manufacturing cost. Moreover, the additional circuitry may increase power dissipation in the chip since in most cases every comparison circuit is active during each clock cycle. Consequently, CAM is typically only used in specialized applications where searching speed cannot be achieved using a less costly approach.
In a standard CAM, each CAM cell contains circuitry for performing an exclusive-OR (XOR) function. The XOR circuits for each data word are then summed by a wired-OR connection onto a match line. During a search operation, if any bit of the supplied search word is different from the corresponding bit of each stored data word, the XOR of the bit that does not match pulls down the match line of the stored word. The time it takes for the match line to discharge when only one bit is different between the search word and the stored word is a significant part of the overall critical delay of the search operation in the CAM. In this scenario, a single XOR circuit must discharge the match line. CAM words can be very wide (e.g., 64, 128 and even 256 bits are commonly used). As the number of CAM cells connected to a given match line in the memory circuit increases, the time for a single CAM cell to discharge the match line increases accordingly. This is due primarily to the increased capacitance on the match line attributable to the CAM cells connected thereto.
In many cases, particularly single-ended sensing applications, the logical state of a selected match line in a CAM is sensed, for example during a search operation, by an inverter connected to the corresponding match line. A local search time of the memory circuit is defined primarily by the time it takes for the voltage on the match line to reach a switching point of the sensing inverter. Therefore, since it is desirable to minimize search time in the CAM, it is beneficial to reduce the time it takes for the voltage on the match line to reach the switching point of the sensing inverter.
One known technique for reducing the search time in a CAM is to employ differential latch sensing. However, latch sensing adds significant complexity to the CAM design due at least in part to the lack of differential match lines and due to the substantial amount of noise generated by simultaneously searching every word stored in the CAM. Another known technique is to employ larger memory cells having increased gain capable of more quickly driving (e.g., charging or discharging) the corresponding match lines. However, using larger memory cells undesirably increases the physical area and the power consumed by the memory cells, and thereby increases the cost of a memory circuit which uses such cells.
Accordingly, there exists a need for an improved searching arrangement and/or CAM cell for use with a CAM circuit which does not suffer from one or more of the problems exhibited by conventional CAM searching methodologies and/or CAM cells.